{"id":805,"date":"2015-10-28T07:52:53","date_gmt":"2015-10-28T07:52:53","guid":{"rendered":"http:\/\/coolt.ch\/notizen\/?p=805"},"modified":"2015-11-13T09:57:53","modified_gmt":"2015-11-13T09:57:53","slug":"vhdl-std_logic_vector","status":"publish","type":"post","link":"https:\/\/coolt.ch\/notizen\/vhdl-std_logic_vector\/","title":{"rendered":"VHDL signal operationen"},"content":{"rendered":"<p><a href=\"http:\/\/www.csee.umbc.edu\/portal\/help\/VHDL\/operator.html\">Operatoren Beschreibung<\/a><\/p>\n<p><strong>not<\/strong><br \/>\nkann f\u00fcr boolean und signale gebraucht werden<\/p>\n<pre class=\"top-set:false bottom-set:false lang:c decode:true\">std_logic_signal_1 &lt;= <strong>not<\/strong> std_logic_signal_2;\r\n\r\nif (<strong>not<\/strong> enable_data_1) then\r\n    \/\/<\/pre>\n<p>&nbsp;<\/p>\n<p><strong><a href=\"http:\/\/coolt.ch\/notizen\/vhdl-and\/\">and, &amp; , +<\/a><\/strong><\/p>\n<pre class=\"top-set:false bottom-set:false lang:c decode:true\">std_logic_signal &lt;= signal_a <strong>and<\/strong> signal_b;<\/pre>\n<p>&nbsp;<\/p>\n<p><strong><a href=\"http:\/\/coolt.ch\/notizen\/vhdl-normales-dezimales-zaehlen\/\">natural, unsigned, integer<br \/>\n<\/a><\/strong>Typkonversionen zwischen den logischen Signalen und den nat\u00fcrlichen.<\/p>\n<p>&nbsp;<\/p>\n<p><strong>Bit Operationen<\/strong><br \/>\n<a href=\"http:\/\/coolt.ch\/notizen\/signale-zusammensetzen\/\">Signale zusammensetzen<\/a><br \/>\n<a href=\"http:\/\/coolt.ch\/notizen\/vhdl-bits-aus-vektor-extrahieren\/\">Bist aus Vektor extrahieren<\/a><br \/>\n<a href=\"http:\/\/coolt.ch\/notizen\/vhdl-signal-index-7-downto-0\/\">Signal Bits setzen (LSB, MSB)<\/a><\/p>\n","protected":false},"excerpt":{"rendered":"<p>Operatoren Beschreibung not kann f\u00fcr boolean und signale gebraucht werden std_logic_signal_1 &lt;= not std_logic_signal_2; if (not enable_data_1) then \/\/ &nbsp; and, &amp; , + std_logic_signal &lt;= signal_a and signal_b; &nbsp; natural, unsigned, integer Typkonversionen zwischen den logischen Signalen und den nat\u00fcrlichen. &nbsp; Bit Operationen Signale zusammensetzen Bist aus Vektor extrahieren Signal Bits setzen (LSB, MSB)<\/p>\n","protected":false},"author":1,"featured_media":0,"comment_status":"closed","ping_status":"closed","sticky":false,"template":"","format":"standard","meta":[],"categories":[59],"tags":[11,46,74],"_links":{"self":[{"href":"https:\/\/coolt.ch\/notizen\/wp-json\/wp\/v2\/posts\/805"}],"collection":[{"href":"https:\/\/coolt.ch\/notizen\/wp-json\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/coolt.ch\/notizen\/wp-json\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/coolt.ch\/notizen\/wp-json\/wp\/v2\/users\/1"}],"replies":[{"embeddable":true,"href":"https:\/\/coolt.ch\/notizen\/wp-json\/wp\/v2\/comments?post=805"}],"version-history":[{"count":4,"href":"https:\/\/coolt.ch\/notizen\/wp-json\/wp\/v2\/posts\/805\/revisions"}],"predecessor-version":[{"id":953,"href":"https:\/\/coolt.ch\/notizen\/wp-json\/wp\/v2\/posts\/805\/revisions\/953"}],"wp:attachment":[{"href":"https:\/\/coolt.ch\/notizen\/wp-json\/wp\/v2\/media?parent=805"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/coolt.ch\/notizen\/wp-json\/wp\/v2\/categories?post=805"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/coolt.ch\/notizen\/wp-json\/wp\/v2\/tags?post=805"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}